a functional block diagram sync decoder burst c-sync 4fsc encd red green blue quadrature decoder delayed c-sync sc 90 sc 0 clock at 8fsc dc restore and c-sync insertion 5mhz 2-pole lp post- filter composite output* ?.572v to 2v ntsc ?.6v to 2v pal luminance output* ?.572v to 1.43v ntsc ?.6v to 1.4v pal chrominance output* 572mvp-p ntsc 600mvp-p pal ntsc/ pal c-sync delay 180 (pal only) rgb-to-yuv encoding matrix burst y u v sc 90 /270 5mhz 4-pole lp pre-filter 1.2mhz 4-pole lpf 1.2mhz 4-pole lpf sampled- data delay line ? 3.6mhz (ntsc) 4.4mhz (pal) 3-pole lpf ? x2 x2 x2 power and grounds +5v agnd dgnd logic analog analog only analog logic +5v ?v *note: the luminance, composite, and chrominance outputs are at twice normal levels for driving 75 w reverse-terminated lines. asnc ntsc/ pal balanced modulators ntsc/ pal x2 x2 x2 rout 1.5vp-p gout 1.5vp-p bout 1.5vp-p ad721 (only) ntsc/ pal ad720/ad721 features composite video output chrominance and luminance (s-video) outputs no external filters or delay lines required drives 75 w reverse-terminated loads compact 28-pin plcc logic selectable ntsc or pal encoding modes automatically selects proper chrominance filter cutoff frequency for encoding standard logic selectable encode or power-down mode (ad720 only) logic selectable encode or bypass mode (ad721 only) low power: 200 mw typical applications rgb to ntsc or pal encoding drive rgb signals into 75 w load (ad721 only) product description the ad720 and ad721 rgb to ntsc/pal encoders convert red, green and blue color component signals into their corre- sponding luminance (baseband amplitude) and chrominance (subcarrier amplitude and phase) signals in accordance with either ntsc or pal standards. these two outputs are also combined to provide a composite video output. all three out- puts are available separately at voltages of twice the standard signal levels as required for driving 75 w reverse terminated cables. the ad721 also features a bypass mode, in which the rgb inputs may bypass the encoder section of the ic via three gain-of-two amplifiers suitable for driving 75 w reverse termi- nated cables. the ad720 and ad721 provide a complete, fully calibrated function, requiring only termination resistors, bypass capacitors, a clock input at four times the subcarrier frequency, and a com- posite sync pulse. there are two control inputs: one input selects the tv standard (ntsc/pal) and the other (encd) powers down most sections of the chip when the encoding func- tion is not in use (ad720) or activates the triple bypass buffer to drive the rgb signals when rgb encoding is not required (ad721). all logical inputs are cmos compatible. the chip operates from 5 v supplies. (continued on page 5) rgb to ntsc/pal encoders one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. obsolete
rev. 0 C2C parameter conditions min typ max unit signal inputs (rdin, grin, blin) input amplitude ntsc 714 mv pal 700 mv input resistances 1 rdin with respect to agnd 2.3 k w grin with respect to agnd 4.2 k w blin with respect to agnd 4.2 k w input capacitance 5pf logic inputs (c-sync, 4fsc, encd, ntsc) logic lo input voltage 1 v logic hi input voltage 4 v logic lo input current (dc) <1 m a logic hi input current (dc) <1 m a bypass amplifiers (ad721 only) gain error nominal gain of 2 2 C5 +5 % small signal C3 db bandwidth 100 mhz output offset voltage (active state) C50 +50 mv output voltage (inactive state) C50 +50 mv video outputs 3 (luma, crma, cmps) luminance (luma) output bandwidth 5 mhz gain error C5 1 +5 % linearity 0.1 % sync level ntsc 252 286 320 mv pal 300 mv chrominance (crma) output bandwidth ntsc 3.6 mhz pal 4.4 mhz color burst amplitude ntsc 257 286 315 mv p-p pal 300 mv p-p absolute gain error C15 5 +15 % absolute phase error 3 degrees chroma/luma time alignment 4 ntsc C170 ns composite output absolute gain error C5 1 +5 % differential gain with respect to chroma channel 0.1 % differential phase with respect to chroma channel 0.1 degrees output offset voltage chroma, luma, or composite outputs 50 100 mv chroma feedthrough monochrome input 20 55 mv p-p power supplies (apos, dpos, vneg) recommended supply range dual supply 4.75 5.25 v full output current 5 C5 v supply 35 ma +5 v supply 67 ma zero signal quiescent current C5 v supply 10 20 35 ma +5 v supply 10 20 35 ma bypass mode quiescent current C5 v supply 14 20 ma (ad721 only) +5 v supply 14 20 ma ad720/ad721Cspecifications notes 1 input scaling resistors provide best scaling accuracy when source resistance is 37.5 w (75 w reverse-terminated input). 2 required for driving a 75 w double reverse terminated load. 3 all outputs are measured at a reverse-terminated load; voltages at ic pins are twice those specified here. 4 this is a predistortion (per fcc specifications) that compensates for the chroma/luma delay in the low-pass filter that separates the luminance and chrominance signals in a television receiver. 5 crma, luma, and cmps outputs are all connected to 75 w reverse-terminated loads; full-white signal for entire field. specifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality levels. all min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. specifications subject to change without notice. (t a = +25 c and supplies = 5 v unless otherwise noted) obsolete
ad720/ad721 rev. 0 C3C pin descriptions pin mnemonic* description* 1 (nc) gout (no connection) green bypass buffer 2 (nc) apos (no connection) analog positive supply; +5 v 5% 3 (nc) rout (no connection) red bypass buffer 4 agnd analog ground connection 5 encd a logical high enables the ntsc/pal encode mode (a logical low powers down the chip) a logical low enables the rgb bypass mode 6 rdin red component video input 0 mv to 714 mv for ntsc 0 mv to 700 mv for pal 7 agnd analog ground connection 8 grin green component video input 0 mv to 714 mv for ntsc 0 mv to 700 mv for pal 9 agnd analog ground connection 10 blin blue component video input 0 mv to 714 mv for ntsc 0 mv to 700 mv for pal 11 stnd a logical high input selects ntsc encoding a logical low input selects pal encoding cmos logic levels 12 agnd analog ground connection 13 crma chrominance output; subcarrier only** 572 mv peak-to-peak for ntsc 600 mv peak-to-peak for pal 14 apos analog positive supply; +5 v 5% 15 cmps composite video output** C572 mv to 2 v for ntsc C600 mv to 2 v for pal 16 apos analog positive supply; +5 v 5% 17 luma luminance plus sync output** C572 mv to 1.43 v for ntsc C600 mv to 1.4 v for pal 18 vneg system negative supply; C5 v 5% 19 dgnd digital ground connection 20 4fsc clock input at four times the subcarrier frequency 14.318 180 mhz for ntsc 17.734 480 mhz for pal cmos logic levels 21 dpos digital positive supply; +5 v 5% 22 asnc a logical high input resets the subcarrier phase every frame a logical low input resets the subcarrier phase every fourth frame cmos logic levels 23 dpos digital positive supply; +5 v 5% 24 sync input for composite television synchronization pulses negative sync pulses cmos logic levels 25 dgnd digital ground connections (one of two) 26 vneg system negative supply; C5 v 5% 27 (nc) bout (no connection) blue bypass buffer 28 apos analog positive supply; +5 v 5% *( ) pertain only to ad720. **the luminance, chrominance, and composite outputs are at twice normal levels for driving 75 w reverse-terminated lines. ordering guide temperature package model range package option ad720jp 0 c to +70 c 28-pin plcc p-28a ad721jp 0 c to +70 c 28-pin plcc p-28a pin connections 28-lead plastic leaded chip carrier (plcc) package p-28a ad720/ad721 rgb to ntsc/pal encoder 5 6 7 8 9 10 11 28 27 26 1 2 3 4 25 24 23 22 21 20 19 12 13 14 15 16 17 18 dgnd sync dpos asnc dpos 4fsc dgnd encd rdin agnd grin agnd blin stnd agnd rout (nc) apos (nc) gout (nc) apos bout (nc) vneg agnd crma apos cmps luma vneg apos note: connections in ( ) pertain only to ad720 absolute maximum ratings* supply voltage v s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6v internal power dissipation . . . . . . . . . . . . . . . . . . . . . . 600 mw operating temperature range . . . . . . . . . . . . . . 0 c to +70 c storage temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature, soldering 60 sec . . . . . . . . . . . . . . +300 c note *stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended rating conditions for extended periods may affect device reliability. thermal characteristics: 28-pin plastic package: q ja = 100 c. warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad720/ad721 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. obsolete
75 w 75 w tektronix tsg 300 component video waveform generator ad720/ad721 rgb to ntsc/pal encoder sony monitor model 1342 tektronix 1910 composite video waveform generator genlock rgb 3 composite sync fsc 4fsc pixel-clock generator composite video tektronix vm700a waveform monitor figure 1. ad720/ad721 evaluation setup 0.10 0.05 0.00 ?.05 ?.10 0.00 ?.04 0.00 ?.01 ?.04 ?.10 0.10 0.05 0.00 ?.05 ?.10 0.00 0.05 0.05 0.04 0.07 0.01 1st 2nd 3rd 4th 5th 6th dg dp(ntsc) (sync = ext) field = 1 line = 21 differential gain (%) min = ?.10; max = 0.00; p-p/max = 0.10 differential phase ( ) min = 0.00; max = 0.07; p-p = 0.07 figure 2. composite output differential phase and gain, ntsc (nulled to chroma output) 100.0 0.0 0.0 50.0 70.0 60.0 50.0 40.0 30.0 20.0 10.0 0.5 noise reduction: 15.05db apl = 49.6% 525 line ntsc; no filtering slow clamp to 0.00v at 6.63 m s sync = source frames selected: 1 2 microseconds/precision mode off volts ire:flt figure 3. modulated pulse and bar, ntsc 0.0 70.0 60.0 50.0 40.0 30.0 20.0 10.0 microseconds frames selected: 1 2; apl = 45.8% 525 line ntsc; no filtering slow clamp to 0.00v at 6.63 m s precision mode off sync = source 100.0 0.0 0.0 50.0 70.0 60.0 50.0 40.0 30.0 20.0 10.0 0.5 volts ire:flt figure 4. 100% color bars, ntsc 0.0 70.0 60.0 50.0 40.0 30.0 20.0 10.0 microseconds frames selected: 1 2; apl = 11.3% 525 line ntsc; no filtering slow clamp to 0.00v at 6.63 m s precision mode off sync = source 100.0 0.0 0.0 50.0 70.0 60.0 50.0 40.0 30.0 20.0 10.0 0.5 volts ire:flt figure 5. multipulse, ntsc 5.35 m s 4.82 m s 8.0 cycles 39.4 ire 85ns 73ns h timing measurement rs-170a (ntsc) field = 1 line = 22 39.2 ire average 32 to 32 figure 6. horizontal timing, ntsc 4.82 m s 1.98 m s 292.1mv 81ns average 32 to 32 302.2mv h timing (pal) line = 17 82ns 5.52 m s figure 7. horizontal timing, pal ad720/ad721Ctypical characteristics C4C rev. 0 obsolete
ad720/ad721 rev. 0 C5C (continued from page 1) all required low-pass filters are on chip. after the input signals pass through a precision rgb to yuv encoding matrix, two on- chip low-pass filters limit the bandwidth of the u and v color difference signals to 1.2 mhz prior to quadrature modulation of the color subcarrier; a third low-pass filter at 3.6 mhz (ntsc) or 4.4 mhz (pal) follows the modulators to limit the harmonic content of the output. delays in the u and v chroma filters are matched by an on-chip sampled data delay line in the y signal path; to prevent aliasing, prefilter at 5 mhz is included ahead of the delay line and a post filter at 5 mhz is added after the delay line to suppress harmon- ics in the output. these low-pass filters are optimized for mini- mum pulse overshoot. the overall delay is about 170 ns, which precompensates for delays in the filters used to decode the ntsc or pal signal in a television receiver. (this precompen- sation delay is already present in tv broadcasts.) the ad720 and ad721 are available in a 28-pin plastic leaded chip carrier for the 0 c to +70 c commercial temperature range. theory of operation referring to the ad720/ad721 block diagram (figure 8), the rgb inputs (each 0 mv to 714 mv in ntsc or 0 mv to 700 mv in pal) are first encoded into luminance and color difference signals. the luminance signal is called the y signal and the color-difference signals are called u and v. the rgb inputs are encoded into the yuv format using the transformation y = 0.299r + 0.587g + 0.114b u = 0.493 (b-y) v = 0.877 (r-y) for ntsc operation, the chroma amplitude is increased by the factor 1.06 prior to summation with the luminance output. the burst signal is inserted into the y channel in the encoding matrix. the three outputs of the encoding matrix, now transformed into y, u, and v components, take two paths. the y (luminance) signal is passed through a delay line consisting of a prefilter, a sampled-data delay line, and a post filter. the pre- and post-filters prevent aliasing of harmonics back into the baseband video. the overall de- lay is a nominal C170 ns relative to the chrominance signal, in keeping with broadcast requirements to compensate for delays in- troduced by the filters in the decoding process. the u and v components pass through 4-pole modified bessel low-pass filters with a 1.2 mhz C3 db frequency to prevent aliasing in the balanced modulators, where they modulate a 3.579 545 000 mhz (ntsc) or 4.433 618 750 mhz (pal) signal via a pair of balanced modulators driven in quadrature by the color subcarrier. the ad720/ad721 4fsc input drives a digital divide-by-4 cir- cuit (two flip-flops) to create the quadrature signal. the refer- ence phase 0 is used for the u signal. in the ntsc mode, the v signal is modulated at 90 , but in the pal mode, the v modulation input alternates between 90 and 270 at half the line rate as required by the pal standard. the outputs of the balanced modulators are summed and low-pass filtered to re- move harmonics. sync decoder burst c-sync 4fsc encd red green blue quadrature decoder delayed c-sync sc 90 sc 0 clock at 8fsc dc restore and c-sync insertion 5mhz 2-pole lp post- filter composite output* ?.572v to 2v ntsc ?.6v to 2v pal luminance output* ?.572v to 1.43v ntsc ?.6v to 1.4v pal chrominance output* 572mvp-p ntsc 600mvp-p pal ntsc/ pal c-sync delay 180 (pal only) rgb-to-yuv encoding matrix burst y u v sc 90 /270 5mhz 4-pole lp pre-filter 1.2mhz 4-pole lpf 1.2mhz 4-pole lpf sampled- data delay line ? 3.6mhz (ntsc) 4.4mhz (pal) 3-pole lpf ? x2 x2 x2 power and grounds +5v agnd dgnd logic analog analog only analog logic +5v ?v *note: the luminance, composite, and chrominance outputs are at twice normal levels for driving 75 w reverse-terminated lines. asnc ntsc/ pal balanced modulators ntsc/ pal x2 x2 x2 rout 1.5vp-p gout 1.5vp-p bout 1.5vp-p ad721 (only) ntsc/ pal figure 8. ad720/ad721 functional block diagram obsolete
rev. 0 C6C ad720/ad721 the filtered output is summed with the luminance signal to cre- ate a composite video signal. the separate luminance, chromi- nance, and composite video signals are amplified by gain-of-two amplifiers for driving 75 w reverse-terminated lines. the sepa- rate luminance and chrominance outputs together are known as s-video. the digital section of the ad720/ad721 is clocked by the 4fsc input. it measures the width of pulses in the composite sync input to separate vertical, horizontal, and serration pulses and to insert the subcarrier burst only after a valid horizontal sync pulse. asserting the encd pin to a logical low routes the ad721s rgb inputs through three gain-of-two bypass buffers for driving 75 w reverse-terminated lines, bypassing the encoder section of the ad721. the triple bypass amplifier is utilized to overcome the loading effects of a tv-out connection on the rgb moni- tor output. when a video encoder is connected to outputs of a current-out video ramdac or vga controller, the r, g, and b signals to the monitor are loaded-down. this requires the use of a gain block to properly drive the monitor. 0.1 m f 4 3 2 1 28 27 26 18 17 16 15 14 13 12 11 10 9 8 6 7 5 19 25 24 23 22 21 20 agnd nc nc apos vneg nc sync dpos 4fsc dpos asnc dgnd encd rdin agnd grin agnd blin stnd agnd crma apos cmps apos luma vneg dgnd ad720 chrominance output composite output luminance output 75 w 75 w 75 w rgb to ntsc/pal encoder nc 0.1 m f 0.1 m f 0.1 m f 0.1 m f 0.1 m f ?v from analog supply composite sync input cmos logic level negative sync tips +5v from digital supply +5v from digital supply 4 x subcarrier input cmos logic levels ntcs = 14.318 180mhz pal = 17.734 480mhz encode input encode = cmos high power down = cmos low video standard selection input ntsc = cmos high pal = cmos low +5v from analog supply +5v from analog supply ?v from analog supply 75 w 75 w 75 w video ram-dac adv47x adv71xx ior iog iob 75 w 75 w 75 w figure 9. ad720 application +5v from analog supply 0.1 m f 0.1 m f ?v from analog supply blue output green output red output 75 w 75 w 75 w 4 3 2 1 28 27 26 18 17 16 15 14 13 12 11 10 9 8 6 7 5 19 25 24 23 22 21 20 agnd nc nc apos vneg nc sync dpos 4fsc dpos asnc dgnd encd rdin agnd grin agnd blin stnd agnd crma apos cmps apos luma vneg dgnd ad721 chrominance output composite output luminance output 75 w 75 w 75 w rgb to ntsc/pal encoder nc 0.1 m f 0.1 m f 0.1 m f 0.1 m f ?v from analog supply composite sync input cmos logic level negative sync tips +5v from digital supply +5v from digital supply 4 x subcarrier input cmos logic levels ntcs = 14.318 180mhz pal = 17.734 480mhz encode input encode = cmos high bypass = cmos low video standard selection input ntsc = cmos high pal = cmos low +5v from analog supply 75 w 75 w 75 w video ram-dac adv47x adv71xx ior iog iob 75 w 75 w 75 w figure 10. ad721 application obsolete
ad720/ad721 rev. 0 C7C color burst ntsc: 5.30 m s pal: 5.46 m s composite sync pulse ntsc: 2.51 m s pal: 2.25 m s ntsc: 2.51 m s pal: 2.25 m s ntsc: 2.79 m s pal: 3.21 m s if the trailing edge of a composite sync pulse is within this window, the pulse is treated as a horizontal sync pulse. if the trailing edge is outside this window, the pulse is treated as an equalizing or blanking pulse. applying the ad720/ad721 figure 9 shows the application of the ad720 and figure 10 shows the application of the ad721. note that the ad720 and ad721 differ from other analog encoders because they are dc coupled. this means that, for example, the expected rgb inputs are 0 mv to 714 mv in ntsc and 0 mv to 700 mv in pal. the luminance, chrominance, and composite outputs are also dc coupled. these outputs can drive a 75 w reverse- terminated load. unused outputs should be terminated with 150 w resistors. the rgb data must be supplied to the ad720/ad721 at ntsc or pal rates, interlaced format. various vga chip set vendors support this mode of operation. most computers supply rgb outputs in noninterlaced format at higher data rates than ntsc and pal, which means that outboard encoders must supply some form of timing conversion before the rgb data reaches the ad720/ad721. note also that the ad720/ad721 does not have internal dc res- toration and does not accept sync on green. the composite sync input is a separate, cmos logical-level input and must be syn- chronized with the 4fsc input, which serves as the master clock for the ad720/ad721. the ad720/ad721 does not implement two elements of the pal and ntsc standards. in ntsc operation, it does not support the 7.5 ire unit setup (1 ire unit = 7.14 mv)this must be added via software using the rgb inputs. many ram- dacs, such as the analog devices adv471 and adv478, offer a logic-selectable setup mode. in pal operation, the ad720/ ad721 does not implement a 25 hz subcarrier offset. decoupling and grounding referring to the pin descriptions, the ad720/ad721 uses mul- tiple analog grounds, digital grounds, digital positive supply in- puts, analog positive supply inputs, and analog negative supply inputs in order to maximize isolation between analog and digital signal paths. the most sensitive input of the ad720/ad721 is the 4fsc pin: any noise on this pin directly affects the subcarrier and causes degradation of the picture. digital and analog grounds should be kept separate and brought together at a single point. all power supply pins should be decoupled using 0.1 m f ceramic capacitors located as close to the ad720/ad721 as possible. in addition, ferrite beads may be slipped over the power supply leads to reduce high frequency noise. if a high speed ram-dac is used (e.g., capable of 80 mhz op- eration with subnanosecond rise times), care must be taken to properly terminate the input printed-circuit-board traces to the ad720/ad721. otherwise, ringing on these traces may occur and cause degradation of the picture. applications hints in applying the ad720/ad721, problems may arise due to in- correct input signals. a few common situations follow. fade to black or whiteinvalid horizontal sync pulses some systems produce sync pulses that are longer or shorter than the ntsc and pal standards specify. the digital sync separator in the ad720/ad721 ignores horizontal sync pulses that are too long or too short. figure 11 shows the timing win- dows for valid ntsc and pal horizontal sync pulses. figure 11. ntsc and pal timing for valid horizontal sync pulses when the horizontal sync pulses are too long or too short, a dc offset voltage (due to charge storage) increases on the output of the sampled data delay lines auto-zero amplifier. normally, this offset voltage is removed at the beginning of every line, as signi- fied by the horizontal sync pulse. without the horizontal sync pulse, the dc offset on the auto-zero amplifier increases over time (usually about three to five minutes) until it overrides the luminance information. the end result is a slow fade to black or white. color flickeringasynchronous operation the ad720/ad721 requires that its 4fsc and composite sync signals be synchronized. in most systems, when the two signals are synchronized, the composite sync signal is generated using a 4fsc signal as the reference. after every four frames, the ad720/ad721 resets the phase quadrature generator. when the csync and 4fsc are synchronized, this reset is transparent to the system because the reference phase does not change. when the csync and 4fsc are not synchronized, the difference between the reference phase and its new value upon reset causes an instantaneous color shift, which appears as a flickering in the color. adding ntsc setup the easiest way to add the 7.5 ire unit 1 setup is to use a adv471/478 or adv477/475 or adv473 type ram-dac, which have a logic-selectable setup (called pedestal on some data sheets and setup on others). color fidelity a source impedance other than 37.5 w (75 w i 75 w a reverse-terminated 75 w input) can cause errors in the yuv encoding matrix, which is basically resistive and depends on the correct source impedance for accuracy. figures 9 and 10 show the correct interface between a ram-dac and the ad720 and ad721 respectively, using 75 w reverse-terminated connections. note 1 ire unit = 7.14 mv. obsolete
rev. 0 C8C ad720/ad721 outline dimensions dimensions shown in inches and (mm). printed in u.s.a. c1932C7.5C7/94 28-lead plastic leaded chip carrier (plcc) package p-28a 0.048 (1.21) 0.042 (1.07) 0.456 (11.58) 0.450 (11.43) sq 0.495 (12.57) 0.485 (12.32) sq 0.048 (1.21) 0.042 (1.07) 0.050 (1.27) bsc 26 4 top view 25 19 12 11 pin 1 identifier 5 18 0.020 (0.50) r 0.032 (0.81) 0.026 (0.66) 0.021 (0.53) 0.013 (0.33) 0.056 (1.42) 0.042 (1.07) 0.025 (0.63) 0.015 (0.38) 0.180 (4.57) 0.165 (4.19) 0.430 (10.92) 0.390 (9.91) 0.110 (2.79) 0.085 (2.16) 0.040 (1.01) 0.025 (0.64) obsolete
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